Video Amplifier with Sync Stripper and DC Restore (EL8102)
Introduction
The circuit in Figure 1 transmits 200MHz (-3dB bandwidth) video signals while stripping off the sync pulse and performing DC restoration. It is configured for a typical video cable driver application driving a double-terminated 75Ω load, where the EL8102 (IC3) is configured for a gain of +2 to ensure unity gain throughout.
Sync Stripping
In component video systems it is frequently necessary to remove the sync pulse from an RGB signal. Sync is often combined with one or more of the red, green, and blue video signals in video distribution amplifiers, routers and switchers to decrease the number of input and output channels required in a switching network. In many applications, however, as the video signals exit the switching network the sync pulse must be removed.
The EL8102 video op amp is specially designed to perform sync stripping. Its open emitter NPN output forms an emitter-follower with the loadresistor, and passes the active video signal while virtually eliminating the negative sync pulse (see Figure 2). Residual sync of the EL8102, defined as the remainder of the original -300mV sync pulse, referenced to ground, is only 8mV at the cable output. A particular advantage of sync stripping with the EL8102 is the resultant larger (by 0.7V) output voltage swing, compared to simply using a wideband video op amp with an external emitter-follower.
Because the EL8102 contains no active pull-down, output linearity degrades as the signal approaches ground. To deal with this a 6.8kΩ pull-up resistor (R8) and a 75Ω pull down resistor (R10) on the output ensure a fixed positive voltage offset, in this case +50mV. This offset was arbitrarily chosen as a good compromise between linearity near the DC level and minimum residual sync. Increasing R8 decreases residual sync, at the expense of linearity. Conversely, decreasing R8 decreases linearity error, but increases residual sync.Other applications benefitting from sync removal are HDTV systems and video digitizing circuits. Consider a typical 1VP-P RGB video signal with a -300mV sync pulse and +700mV video data. By stripping off the unwanted sync pulse and digitizing only the active video, designers can use the full dynamic range of the A/D converter for the +700mV video data. This results in a 30% increase in resolution using the same A/D converter.
DC Restore
Another common video function is DC restoration, used when AC coupled signals have lost their DC reference and must have it periodically reset in order to retain brightness information.
This circuit accomplishes DC restoration using a CA5260 dual op amp (IC1a, IC1b) coupled with a sample-and-hold circuit based on the 74HC4053 switch (IC2). VIN, consisting of the input video signal and a DC offset (VDC), is routed to the non-inverting input of the EL8102 (IC3). The EL8102 is configured in a gain of +2 (to compensate for the attenuation resulting from double terminating the cable), which would result in an output of 2 x VIN = (2 x Video + 2 x VDC), if not for the DC restore circuit.
VIN also travels through half of the dual CA5260 amplifier to the sample-and-hold circuit, where the 0.1µF capacitor (C1) is the hold capacitor. The sample-and-hold control is triggered by a back-porch pulse from a syncseparator or by a horizontal video blanking signal. The DC output signal (VDC) from the sample-and-hold circuit is then amplified at a gain of +2 by the second op amp (IC1b); the gain is required because VDC is input to the EL8102s inverting input which provides only a gain of -1, but as discussed earlier, the output contains a term of 2 x VDC. Thus 2 x VDC is summed into the EL8102 inverting input, is subtracted from the output signal, and yields a DC restored video signal.
Because the output impedance of IC1b is high, and would affect the gain at the non-inverting input of the EL8102, a 47µF capacitor (C2) is used to provide an AC ground and to maintain good high-frequency gain accuracy.
A potentiometer (R3) is used prior to IC1b to null out any offset voltage contributed by the DC restore circuitry.
Conclusion
The circuit's resultant output is a 200MHz, DC restored video signal in which the sync pulse has been stripped to a residual level of no more than 8mV.
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